1. Field of the Invention
The invention relates in general to semiconductor memory devices and in particular to methods for erasing data stored in such devices, and specifically concerns a method for electrical erasing data stored in a FAMOS-type Electrically Programmable Read Only Memory (EPROM) in which a Floating gate Avalanche injection MOS transistor is employed as a memory element and in which data-writing is effected by charge injection from a channel Avalanche current.
2. Prior Art
Examples of technical literature concerning conventionally erasable EPROMs include the following:
(a) "Modern MOS Technology", Dewitt G. Ong, p. 212-216, McGraw-Hill Book Company;
(b) "Comparison and Trends in Today's Dominant E.sup.2 Technologies", '86 IEDM 26-1.
A first type of erasable EPROM from the cited reference (a) is presented in FIG. 1. FIG. 1 is a cross sectional view of an EPROM cell of the FAMOS type (Floating-gate, Avalanche-injection Metal Oxide Semiconductor). In FIG. 1, 1 indicates a p-type substrate, 2 a field oxide film, 3 an n.sup.+ diffusion layer which acts as a drain, 4 an n.sup.+ diffusion layer which acts as a source, 5 a gate oxide film, 6 a first-level polysilicon which acts as a floating gate, 7 an oxide film and 8 a second-level polysilicon which acts as a control gate.
In a conventional EPROM of this nature, the writing of data is performed electrically. Specifically, when data is to be written, a voltage of 12 to 25 volts is applied to the second-level polysilicon control-gate 8, and a pulse of 7 to 20 volts is applied to the drain n.sup.+ diffusion layer 3. A large current, comprised in significant part of an impact avalanche breakdown, is thereby caused to flow between the source 4 and the drain 3, and some of the associated "hot" electrons reach the first-level polysilicon 6 along the electric field in the direction of the gate 8. Because the polysilicon gate 6 is rendered electrically floating by virtue of being completely surrounded by an insulating film of SiO.sub.2, injected hot electrons accumulate within the gate. The threshold voltage V.sub.T of a memory cell in which a charge has thus been accumulated is high, with the consequent absence of significant current at a time of cell reading thereby typically providing an indication of data having in this fashion been electrically written.
In contrast, the associated erasing of data is accomplished non-electrically by exposing the EPROM to ultraviolet light. Such light excites the electrons in a written floating gate, thus imparting them with sufficient energy to leave the gate, and thereby returning the gate to its unwritten state.
A second general category of subject devices is the E.sup.2 PROMs (Electrically Erasable and Programmable ROMs), in which both writing and erasing are accomplished electrically. As indicated in the above-mentioned references (a) and (b), three types of such E.sup.2 PROMs have been proposed. In all of these E.sup.2 PROMs, however, writing and erasing are accomplished by means of a tunnel current through an insulating film.
FIG. 2 thus first shows a cross sectional view of a conventional FLOTOX-type (Floating-Gate, Tunnel-Oxide) E.sup.2 PROM cell. In this figure, 11 indicates a p-type substrate, 12 a field oxide film, 13 an n.sup.+ diffusion layer which acts as a drain, 14 an n.sup.+ diffusion layer which acts as a source, 15 gate oxide film, 16 a tunnel oxide film, 17 a first-level polysilicon which acts as a floating gate, 18 an oxide film and 19 a second-level polysilicon film which acts as a control gate. As is shown in the Figure, a portion of the gate oxide film 15 is configured to form a thin tunnel oxide film 16, through which electrons can be tunneled into or from the floating gate 17 under appropriate conditions.
FIG. 3 next shows a cross sectional view of a second type of conventional E.sup.2 PROM cell, namely the textured-poly type. Numeral 21 thus indicates a silicon substrate, 22 an oxide film, 23 a first-level polysilicon, 24 a second polysilicon which, surrounded by the oxide film 22, acts as a floating gate, and 25 a third polysilicon. Tunneling through the oxide film 22, from the first polysilicon 23 to the gate 24 in the case of writing and from the gate 24 to the third polysilicon 25 in the case of erasing, is again the operative charge-transfer mechanism.
A third type of conventional E.sup.2 PROM is presented in the cross sectional view of FIG. 4. This is the MNOS-type (Metal Nitride Oxide Silicon) E.sup.2 PROM cell. Numeral 31 thus indicates an n-type substrate, 32 a p well, 33 an n.sup.+ diffusion layer which acts as a drain, 34 an n.sup.+ diffusion layer which acts as a source, 35 indicates an oxide film, 36 a first polysilicon, 37 a silicon nitride film, and 38 a second polysilicon. This type of device is designed so that a charge is stored in the silicon nitride film 37. Writing and erasing of data are accomplished by means of a tunnel current in the same general manner as with the other E.sup.2 PROMs previously discussed.
All of the above-mentioned devices suffer from a number of drawbacks, which include the following: First, in the case of the EPROM illustrated in FIG. 1, the erasing of data is accomplished by exposure to ultraviolet light. A window must accordingly be formed in the package in order to allow for the passage of such light. As a result, the assembly process is complicated, costs may be increased, and an ultraviolet irradiation apparatus is required.
In the case secondly of the three types of E.sup.2 PROMs illustrated in FIGS. 2 through 4, V.sub.T following erasing drops excessively, so that the characteristics of a depletion-type transistor are exhibited. Accordingly, each cell must supplementally include one select transistor with a constant V.sub.T. As a result, the required cell area is increased.
Furthermore, in the case of the FLOTOX-type E.sup.2 PROM illustrated in FIG. 2, an additional tunnel-oxide film-formation process is required. Likewise, an additional third polysilicon formation process is required in the case of the textured-poly type E.sup.2 PROM illustrated in FIG. 3, and an additional silicon-nitride film-formation process is required in the case of the MNOS-type E.sup.2 PROM illustrated in FIG. 4.